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Chapter 0912 min readReviewed 31 August 2026

Optimization ladder: change one bottleneck at a time

A measured sequence from idle cleanup and right-sizing through batching, precision, caching, and power.

On this page
  1. The ladder
  2. Quantization
  3. Cache and speculation
  4. Experiment design
Order matters

Remove waste before adding cleverness

The ladder moves from low-risk capacity hygiene to workload-specific engine and hardware changes. Stop when the target is met.

  1. Define workload and SLO.Without the useful unit, optimization has no objective function.
  2. Capture a reproducible baseline.Trace, configuration, quality, tail latency, goodput, memory, energy, and fully loaded cost.
  3. Delete idle allocation.Expire abandoned notebooks/endpoints, stop orphaned nodes, consolidate tiny pools, and make ownership visible.
  4. Right-size device and count.Choose the smallest complete configuration that passes memory, topology, SLO, and availability.
  5. Improve scheduling and reuse.Continuous batching, token budget, chunked prefill, stable templates, prefix/session routing.
  6. Reduce bytes.Weight/activation/KV precision, fusion, graphs, checkpointing, offload where transfers are favorable.
  7. Change topology.Reduce unnecessary TP, place collectives correctly, add DP, or disaggregate only after evidence.
  8. Share and autoscale.Partition predictable small work; scale on queue/token/SLO signals with warm-capacity policy.
  9. Optimize purchase model.Commit only the proven floor; use flexible and interruptible supply for the right tail.
  10. Tune power last.Find throughput-per-watt or joules per useful unit while preserving the SLO.
Four independent knobs

Say what is quantized

Weights, activations, KV cache, and native low-precision formats have different benefits and quality risks.

ComponentExamplePrimary benefitPrimary risk
Weights onlyW4A16, W8A16, AWQ, GPTQModel fit and lower decode weight trafficDequant/kernel overhead; quality; little prefill gain
Weights + activationsW8A8, FP8Less traffic and accelerated GEMMs on native hardwareCalibration and format/hardware dependence
KV cacheFP8/INT8/INT4 KVMore context/concurrency and lower cache trafficRecall/quality loss and conversion overhead
Native very-low precisionNVFP4, MXFP4Large recent-hardware capacity/compute opportunityArchitecture-, model-, scale-, and kernel-specific
  1. Establish BF16/FP16 quality and performance.This is the reference, not an assumption.
  2. Try native FP8.Only where GPU, model, and engine expose optimized kernels.
  3. Try weight-only 4-bit.When residency or low-batch decode bandwidth is the constraint.
  4. Quantize KV separately.When long context or concurrency - not weights - is the limit.
  5. Run task quality gates.Accuracy, structured output, long-context recall, safety, and latency on the real distribution.
Avoid repeated work

Caching and speculation win only when reuse or acceptance is real

Prefix cache

Reuse token-identical prompt blocks. Stabilize system prompts and tool schemas, preserve tokenizer/template versions, route related sessions together, and track hit tokens - not only hit requests.

KV offload

Move reusable or cold blocks to host memory only when saved recomputation exceeds transfer and eviction cost. PCIe, coherent links, and CPU memory bandwidth produce different results.

Speculative decode

Let a draft, n-gram, suffix, MTP, or other proposer guess tokens; the target verifies them. It tends to help low/medium-batch decode with high acceptance and unused compute.

Template engineering

Reordered JSON keys, changing timestamps, whitespace, and per-request tool definitions can eliminate prefix reuse. Treat token stability as a measurable performance feature.

Keep or revert

Every optimization needs a falsifiable scorecard

DimensionBaseline and candidate must record
IdentityModel/app commit, dataset/trace version, tokenizer, engine/container, driver and firmware
HardwareExact GPU variant/count, host, topology, NIC, power cap, cooling, placement
LoadInput/output distributions, arrival rate/burstiness, concurrency, warm/cold state, random seed
Servicep50/p95/p99 latency, throughput, errors, goodput and cold-start
QualityTask accuracy, output validity, long-context and safety gates appropriate to the application
ResourcesPeak HBM, KV occupancy, queue, tensor/SM, DRAM, link, CPU, power and energy
EconomicsFully loaded $/useful unit plus engineering and operational complexity
DecisionPredeclared pass threshold, confidence/repeats, keep/revert owner and date